This invention relates to processes of using Plasma Etching and Reactive Ion Etching to prepare surfaces of p-CdTe thin films for application of ohmic contacts.
Plasma Etching (PE) and Reactive Ion Etching (RIE) are used to prepare the surface of p-type CdTe films so that wet chemical treatments are avoided. These processes may be used for application in preparing photovoltaic and other devices to improve performance by decreasing the losses associated with the back metal contact.
As an alternative source of electrical energy, photovoltaic technology is under extensive industry research; however, to date, the principal reason why the potential of photovoltaic technology has not been optimally realized is due to the difficulty in preparing photovoltaic devices that efficiently convert light into electricity at costs that are competitive with conventional electrical energy sources. Still, industry is continuing to engage in research in an attempt to continually improve the efficiency and reduce the production costs of photovoltaic cells.
A typical single-junction photovoltaic cell is comprised of a substrate on which to form the device, two ohmic contacts to conduct current to an external electrical circuit, and two or more semiconductor layers in series to form the semiconductor junction. At least one of these semiconductor layers (the absorber) is chosen so that its bandgap is of a value for near-optimum conversion of solar radiation. In a typical design, one semiconductor layer is doped n-type, and the adjacent layer is doped p-type. The intimate proximity of these layers forms a semiconductor p-n junction. The p-n junction provides an electric field that facilitates charge separation in the absorber layer(s) when the cell is illuminated, and charge collection at the ohmic contacts.
In the standard photovoltaic cell including the substrate for mounting the cell and two ohmic contacts for conducting current to an external electrical circuit, in addition to the n-type layer and the p-type layer of a p-n junction cell, a three layer cell can include an intrinsic (i-type) layer disposed between the n-type layer and the p-type layer for absorption of light.
In the photovoltaic cell, the semiconductor layers may be formed from single crystalline materials, amorphous materials, or polycrystalline materials. However, single crystalline materials are preferred from an efficiency perspective, because efficiencies are available in excess of about 20% in specific single crystalline photovoltaic cells. Nevertheless, the disadvantage associated with single crystalline materials is the high cost of the material as well as the difficulty in depositing the single crystalline materials.
On the other hand, in the case of amorphous materials, one must contend with low carrier mobility, low minority carrier lifetime, low efficiency, and issues of cell stability. Therefore, while single-crystalline and amorphous materials are utilized in some photovoltaic device applications, semiconductor layers composed of polycrystalline materials are viewed as preferred alternatives for the production of photovoltaic devices that would be economically viable for wide range of applications.
Polycrystalline materials offer the most numerous advantages for the production of photovoltaic cells. However, there is a desire in the industry of the field of polycrystalline materials to increase the efficiency of the polycrystalline photovoltaic cells from the current efficiencies of from about 5-10% range to about a range of 10-15%, and ultimately to advance the efficiencies of polycrystalline photovoltaic cells closer to the 15-25% range of the single-crystalline materials.
Cadmium telluride is a semiconductor with electrical properties recognized in the industry as well suited for conversion of sunlight into electrical energy. The material has a bandgap that is nearly optimum for conversion of terrestrial radiation, and the ability to be doped n-type and p-type, that permits the formation of a large range of junction structures.
One significant technological problem with CdTe-based devices is that it is difficult to form an ohmic contact to the p-type form of the material. This is observed for both single crystalline and polycrystalline p-type CdTe, and results from a combination of large semiconductor work function, and the inability of CdTe to sustain sufficiently high p-type carrier concentration to enable quantum-mechanical tunneling of charge carriers at the CdTe/metal contact interface. In addition to these fundamental problems, the polycrystalline p-type CdTe material used as the absorber in a CdS/CdTe photovoltaic device is typically treated with Cl-containing liquids or vapors just prior to the formation of ohmic contact. The Cl treatments improved junction performance, but also can produce a CdTe surface that is rich in Cl. Furthermore, the formation of oxide layers from atmospheric oxygen or other processes can alter the chemical properties of the p-type CdTe surface. These factors can effect the electrical transport at the contact interface, and alter the characteristics of the ohmic contact.
To remove the contaminated outer surface of the p-type CdTe, wet chemical treatments are often used. In addition to removing unwanted contamination from the surface, these treatments often have the added benefit of forming a Te-rich layer at the surface, and this Te-layer assists in forming the ohmic contact.
Accordingly, there is a need in the art of preparing the back surface of CdS/CdTe thin-film photovoltaic devices, to minimize and/or eliminate the effect of variations and provide uniform reproducible surfaces on to which subsequent contact layers can be appliedxe2x80x94first utilizing a xe2x80x9cdry processxe2x80x9d which is inherently compatible with in-line manufacturing and does not produce significant waste products.
The present invention encompasses the use of plasma etching and reactive ion etching to prepare the surface of p-type CdTe films to avoid wet chemical treatments and the problems associated therewith.
A heterojunction p-i-n photovoltaic cell having at least three different semiconductor layers formed of at least four different elements comprising a p-type wide band gap semiconductor layer, a high resistivity intrinsic semiconductor layer, used as an absorber of light radiation, and an n-type wide band gap semiconductor layer is disclosed in U.S. Patent 4,710,589. The intrinsic layer is in electrically conductive contact on one side with the p-type layer and on an opposite side with the n-type layer. First and second ohmic contacts are in electrically conductive contact with the p-type layer and the n-type layer.
U.S. Pat. No. 4,766,084 discloses a process for producing an electric contact on a HgCdTe substrate having a P conductivity and application to the production of an N/P diode, and specifically uses ion bombardment for removal etching of SiO2 insulator layer.
A process for replacement of chemical etching with a process involving CF4 plasma etching plus heat treatment to form an improved gate area in n-type xcex1-Si on top of intrinsic xcex1-Si is disclosed in U.S. Pat. No. 4,581,099.
U.S. Pat. No. 5,002,632 discloses combining remotely created Ar+metastable species with reactant gas near to the substrate to avoid contamination and etching of the reactor vessel and associative hardware.
The use of radiation of wavelength shorter than 436 nm to assist in plasma ignition for low-pressure/closer-plate-spacing situations is disclosed in U.S. Pat. No. 5,246,529.
One object of the invention is to provide improved photovoltaic device performance by decreasing the losses associated with the back contact by preparing the surface of p-CdTe films utilizing a method which avoids wet chemical treatments.
Another object of the present invention is to provide surfaces of p-type CdTe films for application of ohmic contacts that have not been prepared using wet chemical treatments, but instead, using plasma etching.
Another object of the invention is to provide surfaces of p-type CdTe films for application of ohmic contacts that have not been prepared utilizing wet chemical treatments, but instead, using reactive ion etching.
In general, the invention is accomplished by placing a CdS/CdTe sample into a chamber capable of evacuation to pressures  less than 1exe2x88x923 torr through the use of appropriate vacuum pumps. The sample is oriented on a sample holder with the p-CdTe side of the sample facing the plasma region (p-CdTe side up). The sample may be positioned on a sample holder that can allow for sample heating or cooling, and in the case of Reactive Ion Etching (RIE), the sample holder is equipped to provide a radio-frequency (r.f.) bias by the use of a power supply, capacitive matching network, electrical feedthroughs, and electrical insulation. Once the sample is loaded into the processing chamber, the chamber is evacuated to an appropriate base pressure.
In the case of Plasma Etching (PE) and Reactive Ion Etching (RIE), a base vacuum pressure is established within the processing chamber, whereupon the chamber is backfilled with Ar and optionally, other reactive gas species to a pressure appropriate for plasma ignition and operation (xcx9clexe2x88x922 torr). The plasma is generated in this rarefied gas mixture by energizing the cathode via connection to a power supply. The plasma generates various energetic gas species (electrons, atomic neutrals and ions), and these interact with the p-CdTe surface to alter the near surface chemistry.
Following the plasma processing, deposition of appropriate contact layers should be performed before the plasma processed CdTe surface is exposed to air or other contamination.